This is information on a product in full production.
August 2019 DS12325 Rev 3 1/92
STM32L010K8
STM32L010R8
Value line ultra-low-power 32-bit MCU Arm
®
-based Cortex
®
-M0+,
64-Kbyte Flash memory, 8-Kbyte SRAM, 256-byte EEPROM, ADC
Datasheet - production data
Features
Ultra-low-power platform
1.8 V to 3.6 V power supply
40 to 85 °C temperature range
0.27 µA Standby mode (2 wakeup pins)
0.4 µA Stop mode (16 wakeup lines)
0.8 µA Stop mode + RTC + 8-Kbyte RAM
retention
Down to 88 µA/MHz in Run mode
5 µs wakeup time (from Flash memory)
41 µA 12-bit ADC conversion at 10 ksps
Core: Arm
®
32-bit Cortex
®
-M0+
From 32 kHz to 32 MHz
0.95 DMIPS/MHz
Reset and supply management
Ultra-low-power BOR (brownout reset) with
5 selectable thresholds
Ultra-low-power POR/PDR
Clock sources
0 to 32 MHz external clock
32 kHz oscillator for RTC with calibration
High-speed internal 16 MHz factory-trimmed RC
(±1%)
Internal low-power 37 kHz RC
Internal multispeed low-power 65 kHz to
4.2 MHz RC
PLL for CPU clock
Pre-programmed bootloader
USART, SPI supported
Development support
Serial wire debug supported
Up to 51 fast I/Os (45 I/Os 5-Volt tolerant)
Memories
64-Kbyte Flash memory
8-Kbyte RAM
256 bytes of data EEPROM
20-byte backup register
Sector protection against R/W operation
Analog peripherals
12-bit ADC 1.14 Msps up to 16 channels (down
to 1.8 V)
7-channel DMA controller, supporting ADC, SPI,
I2C, USART and timers
4x peripherals communication interface
1x USART (ISO7816), 1x LPUART (low power)
1x SPI 16 Mbit/s
1x I2C (SMBus/PMBus)
7x timers: 1x 16-bit with up to 4 channels,
1x 16-bit with up to 2 channels, 1x 16-bit ultra-low-
power timer, 1x SysTick, 1x RTC and 2x watchdogs
(independent/window)
CRC calculation unit, 96-bit unique ID
All packages are ECOPACK2 compliant.
LQFP32
7x7mm
LQFP64
10 x 10 mm
www.st.com
Contents STM32L010K8 STM32L010R8
2/92 DS12325 Rev 3
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3 Arm
®
Cortex
®
-M0+ core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Reset and supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4.4 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.6 Low-power real-time clock and backup registers . . . . . . . . . . . . . . . . . . . 21
3.7 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.8 Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.9 Direct memory access (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.10 Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.11 Internal voltage reference (V
REFINT
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.12 System configuration controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.13 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.13.1 General-purpose timers (TIM2, TIM21) . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.13.2 Low-power timer (LPTIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.13.3 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.13.4 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.13.5 Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.14 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.14.1 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.14.2 Universal synchronous/asynchronous receiver transmitter (USART) . . 26
3.14.3 Low-power universal asynchronous receiver transmitter (LPUART) . . . 27