November 2014 DocID023035 Rev 4 1/35

AN4080

Application note

Getting started with STM32F0x1/x2/x8

hardware development

Introduction

This application note is intended for system designers who require a hardware

implementation overview of the development board features such as the power supply, the

clock management, the reset control, the boot mode settings and the debug management. It

shows how to use the STM32F0xxxx product family and describes the minimum hardware

resources required to develop your application.

Within the STM32F0xxxx product family, the STM32F0x8 line offers a different embedded

power management to support 1.8 V operation.

This document also includes detailed reference design schematics with the description of

the main components, interfaces and modes.

Note: In this document, the notation used for devices is STM32F0xx where xx are the two first

digits following F0 standing for entry-level family. Pin count and memory size d not impact

this hardware description.

Table 1. Applicable products

Type Part number

Microcontrollers

STM32F031C4, STM32F031C6, STM32F031F4, STM32F031F6,

STM32F031G4, STM32F031G6, STM32F031K4, STM32F031K6,

STM32F038C6, STM32F038F6, STM32F038G6, STM32F038K6,

STM32F042C4, STM32F042C6, STM32F042F4, STM32F042F6,

STM32F042G4, STM32F042G6, STM32F042K4, STM32F042K6,

STM32F042T4, STM32F042T6,

STM32F048C6, STM32F048G6, STM32F048T6

STM32F051C4, STM32F051C6, STM32F051C8,

STM32F051K4, STM32F051K6, STM32F051K8,

STM32F051R4, STM32F051R6, STM32F051R8,

STM32F058C8, STM32F058R8,

STM32F071V8, STM32F071CB, STM32F071RB, STM32F071VB,

STM32F072C8, STM32F072R8, STM32F072V8,

STM32F072CB,STM32F072RB, STM32F072VB,

STM32F078CB, STM32F078RB, STM32F078VB,

STM32F091CB, STM32F091RB, STM32F091VB,

STM32F091CC, STM32F091RC, STM32F091VC,

STM32F098CC, STM32F098RC, STM32F098VC

www.st.com

Contents AN4080

2/35 DocID023035 Rev 4

Contents

1 Power supplies and reset sources of the

STM32F0xx family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1.1 Independent analog converter supply . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1.2 Battery backup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

1.2 Reset and power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2.1 Power-on reset (POR) / power-down reset (PDR) of the STM32F0x1/x2

devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2.2 External power-on reset and power-down reset (NPOR) of the

STM32F0x8 devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2.3 System reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.2.4 Programmable voltage detector (PVD) of the STM32F0x1/x2

devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2 Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.1 High speed external clock signal (HSE) OSC clock . . . . . . . . . . . . . . . . . 16

2.2 LSE clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.3 HSI 8 MHz clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.4 LSI clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 ADC clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.6 HSI 48 MHz clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.6.1 HSI 48 MHz RC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.6.2 HSI 48 MHz clock recovery system (CRS) . . . . . . . . . . . . . . . . . . . . . . 19

2.7 Clock security system (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3 Boot configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4 Debug management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.2 SWD port (serial wire debug) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.3 Pinout and debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.3.1 Serial wire debug (SWD) pin assignment . . . . . . . . . . . . . . . . . . . . . . . 22

4.3.2 SWD pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23