This is information on a product in full production.
April 2024 DS14540 Rev 1 1/228
STM32H523xx
Arm
®
Cortex
®
-M33 32-bit MCU+TrustZone
®
+ FPU, 375 DMIPS
250 MHz, 512-Kbyte flash, 272-Kbyte RAM
Datasheet - production data
Features
Includes ST state-of-the-art patented technology
Core
Arm
®
Cortex
®
-M33 CPU with TrustZone
®
,
FPU, frequency up to 250 MHz, MPU,
375 DMIPS (Dhrystone 2.1)
ART Accelerator
8-Kbyte instruction cache allowing
0-wait-state execution from flash and external
memories
4-Kbyte data cache for external memories
Benchmarks
1.5 DMIPS/MHz (Drystone 2.1)
1023 CoreMark
®
(4.092 CoreMark
®
/MHz)
Memories
Up to 512 Kbytes of embedded flash memory
with ECC, two banks read-while-write
Up to 48-Kbyte per bank with high-cycling
capability (100 K cycles) for data flash
2-Kbyte OTP (one-time programmable)
272 Kbytes of SRAM (80-Kbyte SRAM2 with
ECC)
2 Kbytes of backup SRAM available in the
lowest power modes
Flexible external memory controller with up to
16-bit data bus: SRAM, PSRAM, FRAM,
NOR/NAND memories
One Octo-SPI memory interface with support
for serial PSRAM/NAND/NOR, hyper
RAM/flash frame formats
One SD/SDIO/MMC interface
Clock management
Internal oscillators: 64 MHz HSI,
48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
External oscillators: 4-50 MHz HSE,
32.768 kHz LSE
General-purpose inputs/outputs
Up to 112 fast I/Os with interrupt capability
(most 5 V tolerant)
Up to ten I/Os with independent supply down to
1.08 V
Low-power consumption
Sleep, Stop, and Standby modes
V
BAT
supply for RTC, 32 backup registers
(32-bit)
Security
Arm
®
TrustZone
®
with Armv8-M mainline
security extension
Up to eight configurable SAU regions
TrustZone
®
aware and securable peripherals
UFBGA
LQFP48 (7 x 7 mm)
LQFP64 (10 x 10 mm)
LQFP100 14 x 14 mm)
LQFP144 (20 x 20 mm)
UFBGA100 (7 x 7 mm)
UFBGA144 (10 x 10 mm)
WLCSP39 (2.76 x 2.78 mm,
pitch 0.4mm)
UFQFPN48 (7 x 7 mm)
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STM32H523xx
2/228 DS14540 Rev 1
Flexible life cycle scheme with secure debug
authentication
SESIP3 and PSA Level 3 certified assurance
target
SFI (secure firmware installation)
Root of trust thanks to unique boot entry and
secure hide protection area (HDP)
Secure firmware upgrade support with TF-M
Public key accelerator, ECDSA signature
verification
HASH hardware accelerator
True random number generator, NIST
SP800-90B compliant
96-bit unique ID
Active tampers
Two DMA controllers to offload the CPU
Two dual-port DMAs with FIFO
Reset and supply management
1.71 V to 3.6 V application supply and I/O
POR, PDR, PVD, and BOR
Embedded regulator with configurable scalable
output to supply the digital circuitry
Up to 16 timers
10x 16-bit (including two low-power 16-bit
timers available in Stop mode)
Two 32-bit timers with up to four IC/OC/PWM
or pulse counters and quadrature (incremental)
encoder input
Two watchdogs
Two SysTick timers
Up to 21 communication interfaces
Up to three I2Cs Fm+ (SMBus/PMBus
®
)
Two I3Cs
Up to six U(S)ARTs (ISO7816 interface, LIN,
IrDA, modem control) and one LPUART
Up to four SPIs including three muxed
full-duplex I2S audio class accuracy via
internal audio PLL or external clock, and up to
four additional SPIs from four USARTs when
configured in Synchronous mode (one
additional SPI with OctoSPI)
Two FDCAN controllers
One 8- to 14-bit camera interface
One 16-bit parallel slave synchronous-
interface
One HDMI-CEC
One USB 2.0 full-speed host and device
(crystal-less)
One USB Type-C
®
/ USB Power Delivery r3.1
Analog
Two 12-bit ADCs with up to 5 Msps in 12-bit
One 12-bit DAC with two channels
Digital temperature sensor
Voltage reference buffer
Debug
Authenticated debug and flexible device life
cycle
Serial wire-debug (SWD), JTAG, Embedded
Trace Macrocell™ (ETM)
ECOPACK2 compliant packages
Table 1. Device summary
Reference Part numbers
STM32H523xx
STM32H523CC, STM32H523RC, STM32H523VC, STM32H523ZC,
STM32H523CE, STM32H523HE, STM32H523RE, STM32H523VE, STM32H523ZE