December 2024 RM0490 Rev 5 1/1027

RM0490

Reference manual

STM32C0 series advanced Arm

-based 32-bit MCUs

Introduction

This reference manual complements the datasheets of the STM32C0 series

microcontrollers, providing information required for application and in particular for software

development. It pertains to the superset of feature sets available on STM32C0 series

microcontrollers.

For feature set, ordering information, and mechanical and electrical characteristics of a

particular STM32C0 series device, refer to its corresponding datasheet.

For information on the Arm

Cortex

-M0+ core, refer to the Cortex

-M0+ technical

reference manual.

The STM32C0 series microcontrollers include ST state-of-the-art patented technology.

Related documents

• “Cortex

-M0+ Technical Reference Manual”, available from:

http://infocenter.arm.com

• PM0223 programming manual for Cortex

-M0+ core

(a)

• STM32C0 series datasheets

(a)

• STM32C0 series errata sheets

(a)

• AN2606 application note on booting STM32 MCUs

(a)

a. Available on STMicroelectronics website www.st.com

www.st.com

Contents RM0490

2/1027 RM0490 Rev 5

Contents

1 Documentation conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

1.1 General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

1.2 List of abbreviations for registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

1.3 Register reset value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

1.4 Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

1.5 Availability of peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

2 Memory and bus architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

2.1 System architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

2.2 Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

2.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

2.2.2 Memory map and register boundary addresses . . . . . . . . . . . . . . . . . . 46

2.3 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

2.4 FDCAN RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

2.5 Flash memory overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

3 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

3.1 Boot configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

3.1.1 Physical remap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

3.1.2 Embedded boot loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

3.1.3 Forcing boot from main flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . 54

3.1.4 Empty check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

4 Embedded flash memory (FLASH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

4.1 FLASH Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

4.2 FLASH main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

4.3 FLASH functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

4.3.1 Flash memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

4.3.2 FLASH read access latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

4.3.3 Flash memory acceleration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

4.3.4 FLASH program and erase operations . . . . . . . . . . . . . . . . . . . . . . . . . 60

4.3.5 FLASH main memory erase sequences . . . . . . . . . . . . . . . . . . . . . . . . 61

4.3.6 FLASH main memory programming sequences . . . . . . . . . . . . . . . . . . 62