Introduction

The STM32H747/757 microcontroller line is based on the high-performance Arm

Cortex

-M7 and Cortex

-M4 32-bit RISC

cores. The system is partitioned into three power domains that operate independently. This allows user applications to obtain

the best trade-off between power consumption and core performance:

• Arm

Cortex

-M7 (CPU1) located in the D1 domain and operating at up to 480 MHz

• Arm

Cortex

-M4 (CPU2) located in the D2 domain and operating at up to 240 MHz

The purpose of this application note is to highlight STM32H747/757 performance and explain how to make the most of their

flexible architecture to reduce power consumption. The document is split into four parts:

1. Introduction to the STM32H747/757 power management concepts and voltage regulators, peripheral allocation by both

CPUs, as well as low-power mode entry and exit.

2. Illustration of how to use the above features to reduce power consumption through a temperature acquisition use case

based on the

STM32H747I-DISCO Discovery kit and the X-NUCLEO-IKS01A2 expansion board with three scenarios:

– D1 domain in DRun mode, D2 domain in DStop and D3 domain in Run mode.

– D1 domain in DStop mode, D2 domain in DStop and D3 domain in Autonomous mode.

– D1 domain in DStop domain, D2 domain in DStop and D3 domain Run/Stop mode.

Graphical display of temperature values using the StemWin library and FreeRTOS

™

Cortex

-M7 and Cortex

-M4 core synchronization using a semaphore.

Refer to the following documents for further information on the STM32H747/757 line:

• STM32H745/755 and STM32H747/757 advanced Arm

-based 32-bit MCUs reference manual (RM0399).

• STM32H747xx and STM32H757xx datasheets.

• STM32H747I-DISCO Discovery kit user manual: Discovery kit with STM32H747XI MCU (UM2411).

How to implement advanced power management on STM32H747/757 MCUs

AN5215

Application note

AN5215 - Rev 2 - August 2024

For further information contact your local STMicroelectronics sales office.