Applicability
This document applies to the part numbers of STM32L552xx/562xx devices and the device variants as stated in this page.
It gives a summary and a description of the device errata, with respect to the device datasheet and reference manual RM438.
Deviation of the real device behavior from the intended device behavior is considered to be a device limitation. Deviation of the
description in the reference manual or the datasheet from the intended device behavior is considered to be a documentation
erratum. The term “errata” applies both to limitations and documentation errata.
Table 1. Device summary
Reference Part numbers
STM32L552xx
STM32L552CE, STM32L552CC, STM32L552ME, STM32L552QC, STM32L552QE, STM32L552RC,
STM32L552RE, STM32L552VC, STM32L552VE, STM32L552ZC, STM32L552ZE
STM32L562xx STM32L562CE, STM32L562ME, STM32L562QE, STM32L562RE, STM32L562VE, STM32L562ZE
Table 2. Device variants
Reference
Silicon revision codes
Device marking
(1)
REV_ID
(2)
STM32L552xx/562xx
A 0x1000
STM32L552xx/562xx B 0x2000
STM32L552xx/562xx Z 0x2001
1. Refer to the device datasheet for how to identify this code on different types of package.
2. REV_ID[15:0] bitfield of DBGMCU_IDCODE register.
STM32L552xx/562xx device errata
STM32L552xx STM32L562xx
Errata sheet
ES0448 - Rev 9 - September 2023
For further information contact your local STMicroelectronics sales office.
www.st.com
1 Summary of device errata
The following table gives a quick reference to the STM32L552xx/562xx device limitations and their status:
A = limitation present, workaround available
N = limitation present, no workaround available
P = limitation present, partial workaround available
“-” = limitation absent
Applicability of a workaround may depend on specific conditions of target application. Adoption of a workaround
may cause restrictions to target application. Workaround for a limitation is deemed partial if it only reduces the
rate of occurrence and/or consequences of the limitation, or if it is fully effective for only a subset of instances on
the device or in only a subset of operating modes, of the function concerned.
Table 3. Summary of device limitations
Function Section Limitation
Status
Rev.
A
Rev.
B
Rev.
Z
Core
2.1.1
Floating-point state can be incorrectly cleared on some exception
return faults
N N N
2.1.2
Access permission faults are prioritized over unaligned Device
memory faults
N N N
System
2.2.1 Full JTAG configuration without NJTRST pin cannot be used A A A
2.2.2 Overconsumption in Stop 2 mode A - -
2.2.3 PWR_SRR register is not secure N - -
2.2.4
SDMMC1SMEN bit of RCC_AHB2SMENR register only modifiable
with word access
A - -
2.2.5 HSE oscillator long startup at low voltage P P P
2.2.6 SMPS step down converter low-power mode N - -
2.2.7 Unstable LSI when it clocks RTC or CSS on LSE P - -
2.2.8
Regulator startup failure at low V
DD
N - -
2.2.9 Voltage scaling range not selectable in SMPS bypass mode P - -
2.2.10 Read of Bank 2 while writing may give unpredictable results N - -
2.2.11 USB, CRS and UCPD may not wake properly from Stop 2 N - -
2.2.12 Low-power run mode not transiting to “Standby with” modes A - -
2.2.13
PA15_PUPEN option bit setting inhibits the UCPD dead battery pull-
down resistor on PB15
A - -
2.2.14 Spurious setting of PC1 as secure N - -
2.2.15 Missing GPIOs on UFBGA132 and WLCSP81 packages N - -
2.2.16 SMPS regulation loss upon transiting into SMPS LP mode P P -
2.2.17 Unpredictable SMPS state at power-on - N -
2.2.18
FLASH_ECCR corrupted upon reset or powerdown occurring during
flash memory program or erase operation
A A A
2.2.19 SRAM write error A A A
2.2.20
Corrupted content of the backup domain due to a missed power-on
reset after this domain supply voltage drop
A A A
2.2.21 LSE crystal oscillator may be disturbed by transitions on PC13 N N N
GPIO 2.3.1
GPIO assigned to DAC cannot be used in output mode when the
DAC output is connected to on-chip peripheral
N N N
STM32L552xx STM32L562xx
Summary of device errata
ES0448 - Rev 9
page 2/45