November 2012 Doc ID 16983 Rev 3 1/42
AN3137
Application note
Analog-to-digital converter on STM8L and STM8AL devices:
description and precision improvement techniques
Introduction
This application note describes the 12-bit analog-to-digital converter (ADC) embedded in
the STM8L and STM8AL family microcontrollers. It offers a selection of hardware and
software methods for improving the precision of this ADC. It is divided into the following
sections:
The first section explains the internal design principle of the STM8L/STM8AL ADC.
The second section describes the ADC operation from the programmer’s point of view.
The final section lists the main types of errors that occur in ADCs and their sources. It
describes some hardware and software methods for minimizing these errors.
Firmware examples (source codes) are provided with this application note showing how to
implement STM8L/STM8AL ADC routines for minimizing measurement errors.
This document applies to the products listed in Ta ble 1.
Table 1. Applicable products
Product family Part numbers
Microcontrollers
STM8L05xxx
STM8L151C2/K2/G2/F2, STM8L151C3/K3/G3/F3
STM8L151x4, STM8L151x6, STM8L151x8
STM8L152x4, STM8L152x6, STM8L152x8
STM8L162R8, STM8L162M8
STM8AL313x, STM8AL314x, STM8AL316x
STM8AL3L4x, STM8AL3L6x
www.st.com
Contents AN3137
2/42 Doc ID 16983 Rev 3
Contents
1 STM8L/STM8AL ADC internal hardware . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1 ADC principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2 ADC resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.3 ADC clock, sampling time, speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.4 Power supply range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.5 ADC reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.6 Input analog multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.6.1 Internal channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.6.2 Fast/slow channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.7 Conversion triggers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.8 Analog watchdog feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.9 Interrupt generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.10 DMA transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.11 Sampling modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2 STM8L/STM8AL ADC usage/programming . . . . . . . . . . . . . . . . . . . . . . 13
2.1 Sampling mode overview and usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.1.1 Single mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.1.2 Continuous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.1.3 Scan mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 Conversion modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.1 Single conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.2 Single conversion with trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.3 One-shot channel sequence scan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.4 Continuous channel sequence scan . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3 Specific modes using ADC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.1 Analog watchdog monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.2 Correction to VDD/VREF stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.3 Measurement of sources with high internal impedance . . . . . . . . . . . . . 15
2.3.4 Low power mode with ADC enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 ADC errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16