This is information on a product in full production.

March 2021 DS12903 Rev 3 1/311

STM32L4P5xx

Ultra-low-power Arm

Cortex

-M4 32-bit MCU+FPU, 150 DMIPS,

up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS

Datasheet - production data

Features

Includes ST state-of-the-art patented

technology

Ultra-low-power with FlexPowerControl

• 1.71 V to 3.6 V power supply

• -40 °C to 85/125 °C temperature range

• Batch acquisition mode (BAM)

• 150 nA in VBAT mode: supply for RTC and

32x32-bit backup registers

• 22 nA Shutdown mode (5 wakeup pins)

• 42 nA Standby mode (5 wakeup pins)

• 190 nA Standby mode with RTC

• 2.95 μA Stop 2 with RTC

• 110 μA/MHz Run mode (LDO mode)

• 41 μA/MHz Run mode (@ 3.3 V SMPS mode)

• 5 µs wakeup from Stop mode

• Brownout reset (BOR) in all modes except

Shutdown

Core

• Arm

32-bit Cortex

-M4 CPU with FPU,

adaptive real-time accelerator (ART

Accelerator) allowing 0-wait-state execution

from Flash memory, frequency up to 120 MHz,

MPU, 150 DMIPS/1.25 DMIPS/MHz

(Dhrystone 2.1), and DSP instructions

Memories

• 1-Mbyte Flash memory, 2 banks read-while-

write, proprietary code readout protection

• 320 Kbytes of SRAM including 64 Kbytes with

hardware parity check

• External memory interface for static memories

supporting SRAM, PSRAM, NOR, NAND and

FRAM memories

• 2 x Octo-SPI memory interfaces

General-purpose inputs/outputs

• Up to 136 fast I/Os, most 5 V-tolerant, up to 14

I/Os with independent supply down to 1.08 V

Performance benchmark

• 1.25 DMIPS/MHz (Drystone 2.1)

• 409.20 CoreMark

(3.41 CoreMark/MHz @120

MHz)

Energy benchmark

• 285 ULPMark™CP score

Up to 24 capacitive sensing channels

• Support touchkey, linear and rotary touch

sensors

Clock management

• 4 to 48 MHz crystal oscillator

• 32 kHz crystal oscillator for RTC (LSE)

• Internal 16 MHz factory-trimmed RC (±1%)

• Internal low-power 32 kHz RC (±5%)

• Internal multispeed 100 kHz to 48 MHz

oscillator, auto-trimmed by LSE (better than

±0.25 % accuracy)

• Internal 48 MHz with clock recovery

• 3 PLLs for system clock, USB, audio, ADC

LQFP48 (7 x 7 mm)

LQFP64 (10 x 10 mm)

LQFP100 (14 x 14 mm)

LQFP144 (20 x 20 mm)

UFQFPN48

(7 x 7 mm)

UFBGA169 (7 x 7 mm)

UFBGA132 (7 x 7 mm)

WLCSP100

(pitch 0.4 mm)

www.st.com

STM32L4P5xx

2/311 DS12903 Rev 3

Interconnect matrix

• 1 AHB bus matrix

14-channel DMA controller

23 communication peripherals

• USB OTG 2.0 full-speed, LPM and BCD

• 2x SAIs (serial audio interface)

• 4x I2C FM+(1 Mbit/s), SMBus/PMBus

• 6x USARTs (ISO 7816, LIN, IrDA, modem)

• 3x SPIs (5x SPIs with the dual Octo-SPI)

• CAN (2.0B Active) and 2x SDMMC

• 8- to 14-bit camera interface up to 32 MHz

(black and white) or 10 MHz (color)

• 8-/16-bit parallel synchronous data

input/output slave interface (PSSI)

11 analog peripherals (independent

supply)

• 2x 12-bit ADC 5 Msps, up to 16-bit with

hardware oversampling, 200 µA/Msps

• 2x 12-bit DAC, low-power sample and hold

• 2x operational amplifiers with built-in PGA

• 2x ultra-low-power comparators

• 2x digital filters for sigma delta modulator

• 1x temperature sensor

Advanced graphics features

• Chrom-ART Accelerator (DMA2D) for

enhanced graphic content creation

• LCD-TFT controller

16x timers and watchdog

• 2 x 16-bit advanced motor-control

• 2 x 32-bit general purpose timers

• 5 x 16-bit general purpose timers

• 2x 16-bit basic timers

• 2x low-power 16-bit timers (available in Stop

mode)

• 2x watchdogs

• 1x SysTick timer

• RTC with hardware calendar, alarms and

calibration

True random generator

CRC calculation unit

HASH (SHA-256) hardware accelerator

Debug mode

• Serial wire debug (SWD)

• JTAG

• Embedded Trace Macrocell

™ (ETM)

96-bit unique ID

Table 1. Device summary

Reference Part numbers

STM32L4P5xx

STM32L4P5AE, STM32L4P5AG, STM32L4P5CE, STM32L4P5CG, STM32L4P5QE,

STM32L4P5QG, STM32L4P5RE, STM32L4P5RG, STM32L4P5VE, STM32L4P5VG,

STM32L4P5ZE, STM32L4P5ZG