Introduction

For designers of STM32 microcontroller (MCU) applications, the ability to replace one microcontroller type with another from the

same product family easily is an important asset. Migrating an application to a different microcontroller is often needed when

product requirements grow, putting extra demands on memory size, or increasing the number of I/Os.

This application note analyzes the steps required to migrate a design based on the STM32L4+ series to STM32U595/5A5,

STM32U599/5A9, STM32U5F7/5G7, and STM32U5F9/5G9 MCUs (named STM32U59x/5Ax and STM32U5Fx/5Gx in this

document). This document is graphic-oriented, including only major peripherals dealing with graphic applications. For a more

complete view on STM32L4+ to STM32U5 series migration, refer to the application note Migrating from STM32L4 and

STM32L4+ to STM32U5 MCUs (AN5372).

Hardware, peripherals, and graphic software are the main aspects considered in this application note.

This document lists the full set of graphic features available for STM32L4+ and STM32U59x/5Ax/5Fx/5Gx devices.

Note: Only STM32U59x/5Ax/5Fx/5Gx devices embed advanced graphic peripherals in the STM32U5 series;

STM32U535/545/575/585 devices do not.

Note: To benefit from this application note, the user can refer to the STM32 microcontroller documentation available on

www.st.com, with particular focus on the reference manual and datasheets.

Migrating a graphic application from STM32L4+ to STM32U59x/5Ax/5Fx/5Gx

MCUs

AN5632

Application note

AN5632 - Rev 2 - September 2023

For further information contact your local STMicroelectronics sales office.

www.st.com

1 STM32U59x/Ax/5Fx/5Gx overview

This document applies to the STM32U59x/5Ax and STM32U5Fx/5Gx Arm

-based microcontrollers.

Note: Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

These devices are ultra-low-power and security MCUs, with enhanced efficiency and performance, such as:

• Up to 4 Mbytes of flash memory with ECC accelerated by instruction cache

• Up to six SRAMs with optional ECC split as follows:

– SRAM1: 768 Kbytes (12 x 64-Kbyte blocks)

– SRAM2: 64 Kbytes (8-Kbyte + 56-Kbyte blocks)

– SRAM3: 832 Kbytes (13 x 64-Kbyte blocks)

– SRAM4: 16 Kbytes

– SRAM5: 832 Kbytes (13 x 64-Kbyte blocks)

– SRAM6: 512 Kbytes (8 x 64-Kbyte blocks)

– BKPSRAM (backup SRAM): 2 Kbytes retaining data in all low-power modes except Shutdown mode.

The backup SRAM can be optionally retained in V

BAT

mode.

The SRAM memory offer fits the graphic applications perfectly, with the fastest embedded memories to manage

the double‑frame buffer processing.

STM32U59x/5Ax/5Fx/5Gx devices use the embedded Arm

Cortex

-M33 32-bit core running at 160 MHz, versus

120 MHz for the STM32L4+ devices based on the Arm

Cortex

-M4 32-bit core. Cortex

-M33 provides improved

security features with the ultra-low-power

Arm

TrustZone

for Armv8-M, and the STMicroelectronics instruction/

data caches (ICACHE/DCACHE) that support both internal and external memories. The instruction cache is

implemented for external and internal memory access, whereas the data cache is implemented only for external

memories.

STM32U59x/5Ax/5Fx/5Gx devices include a larger set of peripherals with more advanced features compared to

STM32L4+, such as the ones listed below:

• Power consumption

– Optimized power consumption in dynamic, using DC/DC and LDO in parallel (on-the-fly selection)

– Optimized power consumption in low-power modes:

◦ Low-power background autonomous mode (LPBAM): autonomous peripherals with DMA,

functional down to Stop 2 mode

◦ Possibility to power on or off some SRAM banks and to keep them in low-power modes

◦ Timers running in Stop mode with input capture mode

◦ Optimized RTC consumption

◦ Advanced 14-bit ADC and ultra-low-power 12-bit ADC

• Security

– AES and PKA (public key accelerator), side attack resistant (by hardware).

– HUK (hardware unique key) to get a secure storage resistant to logical, side, and physical attack.

– Life-cycle/RDP (readout protection): possibility to enable RDP regression with password.

– TrustZone

and securable peripherals.

– Up to eight configurable SAU regions.

– Octo‑SPI memory encryption.

– Active tampering, secure firmware upgrade support, secure hide protection.

– Temperature, voltage, and frequency protection monitoring for tamper detection.

– PKA intended for the computation of cryptographic public key primitives, specifically those related to

RSA, Diffie‑Hellmann, or ECC (elliptic curve cryptography) over GF(p) (Galois fields). To achieve high

performance at a reasonable cost, these operations are executed in the Montgomery domain.

– On-the-fly Octo‑SPI memory decryption by OTFDEC module.

AN5632

STM32U59x/Ax/5Fx/5Gx overview

AN5632 - Rev 2

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