Introduction
The STM32U5 series microcontrollers (MCUs) are based on the high-performance Arm
®
32-bit Cortex
®
M33 CPU with Arm
®
TrustZone
®
and FPU. These MCUs use an innovative architecture to reach best-in-class, ultralow-power figures owing to their
high flexibility and advanced set of peripherals. The STM32U5 series devices provide a very-high energy efficiency for
applications.
The STM32U5 series devices with a "Q" suffix (such as STM32U5xxxxQ) support the use of an internal SMPS in Run and
lowpower modes, enabling very efficient and low-power application design.
With the integration of the ART accelerator 8Kbyte instruction cache, the STM32U5 series MCUs can operate at frequencies up
to 160 MHz and achieve 240 DMIPS performance, while maintaining extremely low dynamic power consumption.
The STM32U5 series devices embed a high number of smart, high-performance peripherals, and a large set of advanced and
ultralowpower analog features. Many peripherals (including communication, analog, timers, and audio) can be functional and
autonomous down to Stop 2 mode with direct memory access, using LPBAM (low-power background autonomous mode).
The combination of ultralow power design and processing performance allows these devices to achieve an industry leading
EEMBC
®
ULPBench
score, up to 464 ULPMark
.
The STM32U5 series MCUs embed several innovations, which minimize the consumption in the different modes, while
maintaining most of the existing peripherals and an excellent pin-to-pin compatibility to allow an easy migration from existing
families.
The built-in internal voltage regulator and voltage scaling keep the consumption in active modesat a minimum, whatever the
external supply voltage. These devices are thus particularly suited for portable batterysupplied products, down to 1.71 V.
Additionally, their multivoltage domains allow a low-voltage supply, while the analogtodigital and digitaltoanalog converters
can operate with a higher supply and reference voltage, up to 3.6 V.
The STM32U5 series devices support a battery backup domain to keep the RTC (real-time clock) running, and a set of
32 registers, each 32 bits wide, that can be retained in case of power loss. This optional backup battery can be charged when
the main supply is present.
These devices support several main low-power modes, each of them with several submode options. This allows the designer to
achieve the best compromise between lowpower consumption, shorter startup time, available set of peripherals, and maximum
number of wake-up sources.
How to optimize power consumption on STM32U5 MCUs
AN5652
Application note
AN5652 - Rev 3 - June 2023
For further information contact your local STMicroelectronics sales office.
www.st.com
1 General information
This application note applies to the STM32U5 series microcontrollers that are Arm
®
Cortex
®
core-based devices.
Note: Arm is a registered trademark of Arm limited (or its subsidiaries) in the US and/or elsewhere.
Reference documents
[1]
Reference manual STM32U5 series Arm
®
-based 32-bit MCUs (RM0456)
[2] Datasheets for STM32U575xx (DS13737), STM32U585xx (DS13086), STM32U535xx (DS14217), STM32U545xx
(DS14216), STM32U59xx (DS13633), and STM32U5Axx (DS13543).
[3] Application note STM32 microcontroller GPIO configuration for hardware settings and low-power consumption
(AN4899)
[4] Application note STM32U5 series power optimization using LPBAM (AN5645)
[5] EEMBC organization on http://www.eembc.org
AN5652
General information
AN5652 - Rev 3
page 2/28