This is information on a product in full production.

September 2024 DS14693 Rev 1 1/129

STM32C071x8/xB

Arm

Cortex

-M0+ 32-bit MCU, 128 KB flash, 24 KB RAM,

2 x USART, timers, ADC, USB FS, comm. I/Fs, 2-3.6V

Datasheet - production data

Features

• Includes ST state-of-the-art patented

technology

• Core: Arm

32-bit Cortex

-M0+ CPU,

frequency up to 48 MHz

• -40°C to 85°C/105°C/125°C operating

temperature

• Memories

– Up to 128 Kbytes of flash memory with

protection and securable area

– 24 Kbytes of SRAM with hardware parity

check

• CRC calculation unit

• Reset and power management

– Voltage range: 2.0 V to 3.6 V

– Separate I/O supply pin (1.65 V to 3.6 V)

– Power-on / power-down reset (POR/PDR)

– Programmable brownout reset (BOR)

– Low-power modes:

Sleep, Stop, Standby, Shutdown

• Clock management

– 4 to 48 MHz crystal oscillator

– 32 kHz crystal oscillator with calibration

– Internal 48 MHz RC oscillator (±1 %)

– Internal 48 MHz RC oscillator with clock

recovery system

– Internal 32 kHz RC oscillator (±5 %)

• Up to 61 fast I/Os

– All mappable on external interrupt vectors

– All 5 V-tolerant

• 5-channel DMA controller with flexible mapping

• 12-bit, 0.4 µs ADC (up to 19 ext. channels)

– Conversion range: 0 to 3.6 V

• 9 timers: 16-bit for advanced motor control, one

32-bit timer and four 16-bit general-purpose,

two watchdogs, SysTick timer

• Calendar RTC with alarm

• Communication interfaces

–Two I

C-bus interface supporting Fast-

mode Plus (1 Mbit/s) with extra current

sink; one supporting SMBus/PMBus™ and

wake-up from Stop mode

– Two USARTs with master/slave

synchronous SPI; one supporting ISO7816

interface, LIN, IrDA capability, auto baud

rate detection and wake-up feature

– Two SPIs (24 Mbit/s) with 4- to 16-bit

programmable bitframe, one multiplexed

with I²S interface; two extra SPIs through

USARTs

• USB 2.0 FS device (crystal-less) and host

controller

• Development support: serial wire debug (SWD)

• 96-bit unique ID

• All packages ECOPACK

2 compliant

Table 1. Device summary

Reference Part number

STM32C071x8

STM32C071F8, STM32C071G8,

STM32C071K8, STM32C071C8,

STM32C071R8

STM32C071xB

STM32C071FB, STM32C071GB,

STM32C071KB, STM32C071CB,

STM32C071RB

LQFP48

LQFP32

7mm)

TSSOP20

(6.4

4.4 mm)

UFQFPN28

(4 × 4 mm)

UFQFPN32

(5 × 5 mm)

UFQFPN48

(7 × 7 mm)

LQFP64

(10 x 10 mm)

WLCSP19

(2.52 x 1.67 mm)

UFBGA64

5mm)

www.st.com

Contents STM32C071x8/xB

2/129 DS14693 Rev 1

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1 Arm

Cortex

-M0+ core with MPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.2 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.3 Embedded flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.3.1 Securable area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.4 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.5 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.6 Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 15

3.7 Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.7.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.7.4 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.7.5 Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.8 Interconnect of peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.9 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.10 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.11 Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.12 DMA request multiplexer (DMAMUX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.13 Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.13.1 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 21

3.13.2 Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 21

3.14 Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.14.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.14.2 Internal voltage reference (V

REFINT

) . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15.1 Advanced-control timer (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15.2 General-purpose timers (TIM2, 3, 14, 16, 17) . . . . . . . . . . . . . . . . . . . . 24

3.15.3 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24