September 2011 Doc ID 018520 Rev 1 1/27

PM0081

Programming manual

STM32F40xxx and STM32F41xxx

Flash prog

ramming manual

Introduction

This programming manual describes how to program the Flash memory of STM32F405xx,

STM32F407xx, STM32F415xx, and STM32F417xx microcontrollers. For convenience,

these will be referred to as STM32F40x and STM32F41x, throughout the document unless

otherwise specified.

The STM32F40x and STM32F41x embedded Flash memory can be programmed using in-

circuit programming or in-application programming.

The in-circuit programming (ICP) method is used to update the entire contents of the

Flash memory, using the JTAG, SWD protocol or the boot loader to load the user application

into the microcontroller. ICP offers quick and efficient design iterations and eliminates

unnecessary package handling or socketing of devices.

In contrast to the ICP method, in-application programming (IAP) can use any

communication interface supported by the microcontroller (I/Os, USB, CAN, UART, I

C, SPI,

etc.) to download programming data into memory. With IAP, the Flash memory can be re-

programmed while the application is running. Nevertheless, part of the application has to

have been previously programmed in the Flash memory using ICP.

The Flash interface implements instruction access and data access based on the AHB

protocol. It implements a prefetch buffer that speeds up CPU code execution. It also

implements the logic necessary to carry out Flash memory operations (program/erase).

Program/erase operations can be performed over the whole product voltage range.

Read/write protections and option bytes are also implemented.

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Contents PM0081

2/27 Doc ID 018520 Rev 1

Contents

1 Flash memory interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.3 Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.4 Read interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.4.1 Relation between CPU clock frequency and Flash memory read time . . 8

1.4.2 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 9

1.5 Erase and program operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.5.1 Unlocking the Flash control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.5.2 Program/erase parallelism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.5.3 Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.5.4 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1.5.5 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1.6 Option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.6.1 Description of user option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.6.2 Programming user option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

1.6.3 Read protection (RDP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

1.6.4 Write protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

1.7 One-time programmable bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

1.8 Flash interface registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

1.8.1 Flash access control register (FLASH_ACR) . . . . . . . . . . . . . . . . . . . . . 19

1.8.2 Flash key register (FLASH_KEYR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

1.8.3 Flash option key register (FLASH_OPTKEYR) . . . . . . . . . . . . . . . . . . . 20

1.8.4 Flash status register (FLASH_SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

1.8.5 Flash control register (FLASH_CR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

1.8.6 Flash option control register (FLASH_OPTCR) . . . . . . . . . . . . . . . . . . . 23

1.8.7 Flash interface register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26