Applicability

This document applies to the part numbers of STM32G050x6/x8 devices and the device variants as stated in this

page.

It gives a summary and a description of the device errata, with respect to the device datasheet and reference

manual RM0360.

Deviation of the real device behavior from the intended device behavior is considered to be a device limitation.

Deviation of the description in the reference manual or the datasheet from the intended device behavior is

considered to be a documentation erratum. The term “errata” applies both to limitations and documentation errata.

Table 1. Device summary

Reference Part numbers

STM32G050x6 STM32G050C6, STM32G050F6, STM32G050K6

STM32G050x8 STM32G050C8, STM32G050K8

Table 2. Device variants

Reference

Silicon revision codes

Device marking

(1)

REV_ID

(2)

STM32G050x6/x8

A 0x1000

Z 0x1001

1. Refer to the device datasheet for how to identify this code on different types of package.

2. REV_ID[15:0] bitfield of DBGMCU_IDCODE register.

STM32G050x6/x8 device errata

STM32G050x6/x8

Errata sheet

ES0544 - Rev 2 - April 2022

For further information contact your local STMicroelectronics sales office.

www.st.com

1 Summary of device errata

The following table gives a quick reference to the STM32G050x6/x8 device limitations and their status:

A = limitation present, workaround available

N = limitation present, no workaround available

P = limitation present, partial workaround available

“-” = limitation absent

Applicability of a workaround may depend on specific conditions of target application. Adoption of a workaround

may cause restrictions to target application. Workaround for a limitation is deemed partial if it only reduces the

rate of occurrence and/or consequences of the limitation, or if it is fully effective for only a subset of instances on

the device or in only a subset of operating modes, of the function concerned.

Table 3. Summary of device limitations

Function Section Limitation

Status

Rev.

System

2.2.1 Unstable LSI when it clocks RTC or CSS on LSE

P P

2.2.2 WUFx wakeup flag wrongly set during configuration A A

2.2.3

Overwriting with all zeros a Flash memory location previously

programmed with all ones fails

N N

2.2.4 Wakeup from Stop not effective under certain conditions N N

2.2.5 PC13 signal transitions disturb LSE N N

2.2.6 Unexpected read-back from DBGMCU N N

2.2.8 Device lock upon mismatch of option bytes P -

GPIO 2.3.1

Wakeup capability-enabled GPIOs not configurable after wakeup from

Standby

P -

DMA 2.4.1

DMA disable failure and error flag omission upon simultaneous transfer

error and global flag clear

A A

DMAMUX

2.5.1 SOFx not asserted when writing into DMAMUX_CFR register N N

2.5.2 OFx not asserted for trigger event coinciding with last DMAMUX request N N

2.5.3 OFx not asserted when writing into DMAMUX_RGCFR register N N

2.5.4

Wrong input DMA request routed upon specific DMAMUX_CxCR register

write coinciding with synchronization event

A A

ADC

2.6.1 Overrun flag is not set if EOC reset coincides with new conversion end P P

2.6.2

Writing ADC_CFGR1 register while ADEN bit is set resets RES[1:0]

bitfield

A A

2.6.3 Out-of-threshold value is not detected in AWD1 Single mode A A

2.6.4 ADC sampling time might be one cycle longer N N

2.6.5 ADC offset may be out of specification A -

TIM

2.7.1

One-pulse mode trigger not detected in master-slave reset + trigger

configuration

P P

2.7.2 Consecutive compare event missed in specific conditions N N

2.7.3 Output compare clear not working with external counter reset P P

2.7.4 TIM16 and TIM17 are unduly clocked by SYSCLK N -

RTC and TAMP 2.8.1 Calendar initialization may fail in case of consecutive INIT mode entry A A

I2C

2.9.1

Wrong data sampling when data setup time (tSU;DAT) is shorter than one

I2C kernel clock period

P P

STM32G050x6/x8

Summary of device errata

ES0544 - Rev 2

page 2/18