This is information on a product in full production.

April 2020 DS12991 Rev 3 1/93

STM32G030x6/x8

Arm

Cortex

-M0+ 32-bit MCU, up to 64 KB Flash, 8 KB RAM,

2x USART, timers, ADC, comm. I/Fs, 2.0-3.6V

Datasheet - production data

Features

• Core: Arm

32-bit Cortex

-M0+ CPU,

frequency up to 64 MHz

• -40°C to 85°C operating temperature

• Memories

– Up to 64 Kbytes of Flash memory with

protection

– 8 Kbytes of SRAM with HW parity check

• CRC calculation unit

• Reset and power management

– Voltage range: 2.0 V to 3.6 V

– Power-on/Power-down reset (POR/PDR)

– Low-power modes:

Sleep, Stop, Standby

–V

BAT

supply for RTC and backup registers

• Clock management

– 4 to 48 MHz crystal oscillator

– 32 kHz crystal oscillator with calibration

– Internal 16 MHz RC with PLL option

– Internal 32 kHz RC oscillator (±5 %)

• Up to 44 fast I/Os

– All mappable on external interrupt vectors

– Multiple 5 V-tolerant I/Os

• 5-channel DMA controller with flexible mapping

• 12-bit, 0.4 µs ADC (up to 16 ext. channels)

– Up to 16-bit with hardware oversampling

– Conversion range: 0 to 3.6V

• 8 timers: 16-bit for advanced motor control,

four 16-bit general-purpose, two watchdogs,

SysTick timer

• Calendar RTC with alarm and periodic wakeup

from Stop/Standby

• Communication interfaces

–Two I

C-bus interfaces supporting Fast-

mode Plus (1 Mbit/s) with extra current

sink, one supporting SMBus/PMBus and

wakeup from Stop mode

– Two USARTs with master/slave

synchronous SPI; one supporting ISO7816

interface, LIN, IrDA capability, auto baud

rate detection and wakeup feature

– Two SPIs (32 Mbit/s) with 4- to 16-bit

programmable bitframe, one multiplexed

with I

S interface

• Development support: serial wire debug (SWD)

• All packages ECOPACK

2 compliant

Table 1. Device summary

Reference Part number

STM32G030x6

STM32G030C6, STM32G030F6,

STM32G030J6, STM32G030K6

STM32G030x8 STM32G030C8, STM32G030K8

LQFP48

LQFP32

7 mm

TSSOP20

6.4

4.4 mm

SO8N

4.9

6 mm

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Contents STM32G030x6/x8

2/93 DS12991 Rev 3

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.1 Arm

Cortex

-M0+ core with MPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.2 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.3 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.5 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.6 Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 14

3.7 Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.7.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.7.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7.4 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.7.5 Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.7.6 VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.8 Interconnect of peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.9 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.10 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.11 Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.12 DMA request multiplexer (DMAMUX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.13 Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.13.1 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 21

3.13.2 Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 21

3.14 Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.14.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.14.2 Internal voltage reference (V

REFINT

) . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.14.3 V

BAT

battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15.1 Advanced-control timer (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15.2 General-purpose timers (TIM3, 14, 16, 17) . . . . . . . . . . . . . . . . . . . . . . 24