This is information on a product in full production.

December 2017 DocID028094 Rev 6 1/143

STM32F410x8 STM32F410xB

Arm

-Cortex

-M4 32b MCU+FPU, 125 DMIPS, 128KB Flash,

32KB RAM, 9 TIMs, 1 ADC, 1 DAC, 1 LPTIM, 9 comm. interfaces

Datasheet - production data

Features

• Dynamic Efficiency Line with eBAM (enhanced

Batch Acquisition Mode)

– 1.7 V to 3.6 V power supply

– -40 °C to 85/105/125 °C temperature range

• Core: Arm

32-bit Cortex

-M4 CPU with FPU,

Adaptive real-time accelerator (ART

Accelerator™) allowing 0-wait state execution

from Flash memory, frequency up to 100 MHz,

memory protection unit,

125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1),

and DSP instructions

• Memories

– Up to 128 Kbytes of Flash memory

– 512 bytes of OTP memory

– 32 Kbytes of SRAM

• Clock, reset and supply management

– 1.7 V to 3.6 V application supply and I/Os

– POR, PDR, PVD and BOR

– 4-to-26 MHz crystal oscillator

– Internal 16 MHz factory-trimmed RC

– 32 kHz oscillator for RTC with calibration

– Internal 32 kHz RC with calibration

• Power consumption

– Run: 89 µA/MHz (peripheral off)

– Stop (Flash in Stop mode, fast wakeup

time): 40 µA Typ @ 25 °C; 49 µA max

@25 °C

– Stop (Flash in Deep power down mode,

slow wakeup time): down to 6 µA @ 25 °C;

14 µA max @25 °C

– Standby: 2.4 µA @25 °C / 1.7 V without

RTC; 12 µA @85 °C @1.7 V

–V

BAT

supply for RTC: 1 µA @25 °C

• 1×12-bit, 2.4 MSPS ADC: up to 16 channels

• 1×12-bit D/A converter

• General-purpose DMA: 16-stream DMA

controllers with FIFOs and burst support

• Up to 9 timers

– One low-power timer (available in Stop

mode)

– One 16-bit advanced motor-control timer

– Three 16-bit general purpose timers

– One 32-bit timer up to 100 MHz with up to

four IC/OC/PWM or pulse counter and

quadrature (incremental) encoder input

– Two watchdog timers (independent

window)

– SysTick timer.

• Debug mode

– Serial wire debug (SWD) & JTAG

interfaces

–Cortex

-M4 Embedded Trace Macrocell™

• Up to 50 I/O ports with interrupt capability

– Up to 45 fast I/Os up to 100 MHz

– Up to 49 5 V-tolerant I/Os

• Up to 9 communication interfaces

– Up to 3x I

C interfaces (SMBus/PMBus)

including 1x I

C Fast-mode at 1 MHz

– Up to 3 USARTs (2 x 12.5 Mbit/s,

1 x 6.25 Mbit/s), ISO 7816 interface, LIN,

IrDA, modem control)

– Up to 3 SPI/I2Ss (up to 50 Mbit/s SPI or

I2S audio protocol)

• True random number generator

• CRC calculation unit

• 96-bit unique ID

• RTC: subsecond accuracy, hardware calendar

• All packages are ECOPACK

Table 1. Device summary

Reference Part number

STM32F410x8

STM32F410T8, STM32F410C8,

STM32F410R8

STM32F410xB

STM32F410TB, STM32F410CB,

STM32F410RB

WLCSP36

UFQFPN48

(7×7mm)

(2.553x2.579mm)

LQFP48 (7x7mm)

&"'!

UFBGA64

(

5x5mm

)

LQFP64 (10×10mm)

www.st.com

Contents STM32F410x8/B

2/143 DocID028094 Rev 6

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.1 Compatibility with STM32F4 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 Arm

Cortex

-M4 with FPU core with embedded Flash and SRAM . . . . 16

3.2 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 16

3.3 Batch Acquisition mode (BAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.4 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.5 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.6 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 17

3.7 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.8 Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.9 DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.10 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 19

3.11 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.12 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.13 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.14 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.15 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.15.1 Internal reset ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.15.2 Internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.16 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.16.1 Internal power supply supervisor availability . . . . . . . . . . . . . . . . . . . . . 22

3.17 Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 23

3.18 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.19 V

BAT

operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.20 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.20.1 Advanced-control timers (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.20.2 General-purpose timers (TIM5, TIM9 and TIM11) . . . . . . . . . . . . . . . . . 26

3.20.3 Basic timer (TIM6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26