This is information on a product in full production.
May 2015 DocID16553 Rev 4 1/116
STM32F101xF
STM32F101xG
XL-density access line, ARM
®
-based 32-bit MCU with 768 KB
to 1 MB Flash, 15 timers, 1 ADC and 10 communication interfaces
Datasheet production data
Features
Core: ARM
®
32-bit Cortex
®
-M3 CPU with MPU
36 MHz maximum frequency,
1.25 DMIPS/MHz (Dhrystone 2.1)
performance
Single-cycle multiplication and hardware
division
Memories
768 Kbytes to 1 Mbyte of Flash memory
(dual bank with read-while-write capability)
80 Kbytes of SRAM
Flexible static memory controller with 4
Chip Select. Supports Compact Flash,
SRAM, PSRAM, NOR and NAND
memories
LCD parallel interface, 8080/6800 modes
Clock, reset and supply management
2.0 to 3.6 V application supply and I/Os
POR, PDR, and programmable voltage
detector (PVD)
4-to-16 MHz crystal oscillator
Internal 8 MHz factory-trimmed RC
Internal 40 kHz RC with calibration
capability
32 kHz oscillator for RTC with calibration
Low power
Sleep, Stop and Standby modes
–V
BAT
supply for RTC and backup registers
1 x 12-bit, 1 µs A/D converters (up to 16
channels)
Conversion range: 0 to 3.6 V
Temperature sensor
2 × 12-bit D/A converters
DMA
12-channel DMA controller
Peripherals supported: timers, ADC, DAC,
SPIs, I
2
Cs and USARTs
Up to 112 fast I/O ports
51/80/112 I/Os, all mappable on 16
external interrupt vectors and almost all
5 V-tolerant
Debug mode
Serial wire debug (SWD) & JTAG
interfaces
Cortex-M3 Embedded Trace Macrocell™
Up to 15 timers
Up to ten 16-bit timers, with up to 4
IC/OC/PWM or pulse counters
2 × watchdog timers (Independent and
Window)
SysTick timer: a 24-bit downcounter
2 × 16-bit basic timers to drive the DAC
Up to 10 communication interfaces
Up to 2 x I
2
C interfaces (SM7816 interface,
LIN, IrDA capability, modem control)
Up to 3 SPIs (18 Mbit/s)
CRC calculation unit, 96-bit unique ID
ECOPACK
®
packages
Table 1. Device summary
Reference Part number
STM32F101xF
STM32F101RF STM32F101VF
STM32F101ZF
STM32F101xG
STM32F101RG STM32F101VG
STM32F101ZG
LQFP144
20 × 20 mm
LQFP64
10 × 10 mm
LQFP100
14 × 14 mm
www.st.com
Contents STM32F101xF, STM32F101xG
2/116 DocID16553 Rev 4
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2.2 Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.1 ARM
®
Cortex
®
-M3 core with embedded Flash and SRAM . . . . . . . . . . 15
2.3.2 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.3 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.4 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 15
2.3.5 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.6 FSMC (flexible static memory controller) . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.7 LCD parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.8 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 16
2.3.9 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.10 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.11 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.12 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.13 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.14 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.15 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.16 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.17 RTC (real-time clock) and backup registers . . . . . . . . . . . . . . . . . . . . . . 19
2.3.18 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3.19 I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.20 Universal synchronous/asynchronous receiver transmitters (USARTs) . 21
2.3.21 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.22 GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.23 ADC (analog to digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.24 DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3.25 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3.26 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3.27 Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22