This is information on a product in full production.

July 2015 DocID027227 Rev 2 1/151

STM32F398VE

ARM

Cortex

-M4 32b MCU+FPU, up to 512KB Flash, 80KB

SRAM, FSMC, 4 ADCs, 2 DAC ch., 7 comp, 4 Op-Amp, 1.8 V

Datasheet - production data

Features

 Core: ARM

Cortex

-M4 32-bit CPU with

72 MHz FPU, single-cycle multiplication and

HW division, DSP instruction and MPU

(memory protection unit)

 Memories

– Up to 512 Kbytes of Flash memory

– 64 Kbytes of SRAM, with HW parity check

implemented on the first 32 Kbytes.

– Routine booster: 16 Kbytes of SRAM on

instruction and data bus, with HW parity

check (CCM)

– Flexible memory controller (FSMC) for static

memories, with four Chip Select

 CRC calculation unit

 Reset and supply management

– Low power modes: Sleep and Stop

– Supply: VDD = 1.8 V ± 8%

DDA

voltage range = 1.65 V to 3.6 V

–V

BAT

supply for RTC and backup registers

 Clock management

–4 to 32 MHz crystal oscillator

– 32 kHz oscillator for RTC with calibration

– Internal 8 MHz RC with x 16 PLL option

– Internal 40 kHz oscillator

 Up to 85 fast I/Os

– All mappable on external interrupt vectors

– Several 5 V-tolerant

 Interconnect matrix

 12-channel DMA controller

 Four ADCs 0.20 µs (up to 38 channels) with

selectable resolution of 12/10/8/6 bits, 0 to

3.6 V conversion range, separate analog

supply from 1.8 to 3.6 V

 Two 12-bit DAC channels with analog supply

from 2.4 to 3.6 V

 Seven ultra-fast rail-to-rail analog comparators

with analog supply from 1.8 to 3.6 V

 Four operational amplifiers that can be used in

PGA mode, all terminals accessible with analog

supply from 2.4 to 3.6 V



Up to 24 capacitive sensing channels supporting

touchkey, linear and rotary touch sensor

 Up to 14 timers

– One 32-bit timer and two 16-bit timers with

up to four IC/OC/PWM or pulse counter and

quadrature (incremental) encoder input

– Three 16-bit 6-channel advanced-control

timers, with up to six PWM channels,

deadtime generation and emergency stop

– One 16-bit timer with two IC/OCs, one

OCN/PWM, deadtime generation and

emergency stop

– Two 16-bit timers with IC/OC/OCN/PWM,

deadtime generation and emergency stop

– Two watchdog timers (independent, window)

– One SysTick timer: 24-bit downcounter

– Two 16-bit basic timers to drive the DAC

 Calendar RTC with Alarm, periodic wakeup

from Stop/Standby

 Communication interfaces

– CAN interface (2.0B Active)

– Three I

C Fast mode plus (1 Mbit/s) with

20 mA current sink, SMBus/PMBus, wakeup

from STOP

– Up to five USART/UARTs (ISO 7816

interface, LIN, IrDA, modem control)

– Up to four SPIs, 4 to 16 programmable bit

frames, two with multiplexed half/full duplex

I2S interface

– Infrared transmitter

 SWD, Cortex

-M4 with FPU ETM, JTAG

 96-bit unique ID

LQFP100

(14 mm × 14 mm)

www.st.com

Contents STM32F398VE

2/151 DocID027227 Rev 2

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1 ARM

Cortex

-M4 core with FPU with embedded Flash and SRAM . . . 13

3.2 Memory protection unit (MPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.3 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.4 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.5 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.6 Cyclic redundancy check (CRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.7 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7.3 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.8 Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.9 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.10 General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.11 Direct memory access (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.12 Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 18

3.13 Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.13.1 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 19

3.14 Fast analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.14.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.14.2 Internal voltage reference (V

REFINT

) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.14.3 V

BAT

battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.14.4 OPAMP reference voltage (VREFOPAMP) . . . . . . . . . . . . . . . . . . . . . . 20

3.15 Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.16 Operational amplifier (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.17 Ultra-fast comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.18 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.18.1 Advanced timers (TIM1, TIM8, TIM20) . . . . . . . . . . . . . . . . . . . . . . . . . 23